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Workshop on HDL(Verilog/VHDL)

Online Instructor led Course

Platform: Skype

3,000

No Reviews Yet
2 Interested

About the Course


1.This class is all about design a digital system using Verilog/VHDL.
2. Different synthesis tools and simulation tool flow explain in the workshop.
3. Writing of effective test bench.

Topics Covered

1. Flow of design.
2. Basic of HDL.
3.Small program example.
4.Synthsys and simulation software flow.
5. FPGA explanation.
6. Large digital system design.

Who should attend

B.Tech Students, M.tech Students who all are interested for final year project.

Pre-requisites

No Pre-requisites are require.

What you need to bring

Bring a laptop if it is possible.

Key Takeaways

Soft copy of all documents.
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About the Trainer

Aashish Jain picture

Aashish Jain

Research Associate


Four year of experience in HDL coding and design. Now working as a research associate at NTU, Singapore for computer algorithm design in the field of arithmetic units.
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Students Interested 2

Course Id: 5851