Learn Chip Design from Scratch: RTL to GDSII (Synopsys)

This class is designed for B.Tech students, fresh graduates, and beginners who are interested in VLSI and semiconductor design, even if they have no prior experience in this field. It is especially useful for students who want to build a strong foundation and move towards careers in chip design, ASIC design, or physical design roles.

In this course, students will learn the complete RTL-to-GDSII flow using industry-standard Synopsys tools. The training starts from basic digital design concepts and gradually progresses to RTL coding, synthesis, static timing analysis, and physical design stages such as floorplanning, placement, clock tree synthesis, and routing. The focus is on practical, hands-on learning so that students gain real-time exposure to how chip design is done in the industry.

Students do not need any prior knowledge to join this class. However, having a laptop and basic familiarity with computers will be helpful. All learning materials, and guidance will be provided during the course, making it easy for anyone to start learning from scratch and build industry-ready skills.