Harsha Sana

Experienced Analog & Mixed signal Layout design engineer
6yrs of hands on experience of different process node
Exposure to Analog/ Mixed signal layout design of BGR, LDO, VCO, Charge pump, Regulators and some digital and memory blocks.
Expertise in physical verification (DRC, LVS), Electrical Checks (ERC), DFM checks (PM, MAS, Missing vias,
Density checks)
Knowledge of layout effects (i.e, matching, reliability, Antenna, proximity effects, spacing effects, stress effects)
Aware of layout techniques to mitigate ESD, latchup & overcoming max density and min density challenges
Knowledge of design for reliability (i.e, EM, IR)
Knowledge of signal integrity issues (i.e, clock/data routes, differential routing, shielding
Good basics of circuit design
Good in coding languages like Unix, PERL, TCL, C & SKILL Programming