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IEEE 2015-16 VLSI FPGA Projects Bangalore

Malleshwaram, Bangalore

15,000

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1 Interested

About the Course


IGeekS Technologies is a company located in Bangalore, India. We have being recognized as a quality provider of hardware and software solutions for the student’s in order carry out their academic Projects. We offer academic projects at various academic levels ranging from graduates to masters (Diploma, BCA, BE, M. Tech, MCA, M. Sc (CS/IT)).

Your Search for Project ends here! Come and join us for Real Time Project Exposure with
In-Depth Training.
ACADEMIC PROJECTS: In Today's job market where there is increasing number of jobs every day, the best source of getting some good hands on for an IT professional is the final year project.

WE CURRENTLY OFFER LIVE PROJECTS IN THE FOLLOWING AREAS:
Java
J2EE
Mobile applications (J2ME)
.NET
Wireless
Embedded
Electronics and Biomedical

Our standard approach to project guidance starts with In-Depth Training, Project SDLC, Documentation etc. The project related activities will begin half way through the course and would further be planned to complete on/before the scheduled time deadline.

Computer & Information Science Eng.
Our area of interest for Computer Science & Information Science Engineering is towards developing projects in the following areas

• Web Development
• Mobile Computing
• Cloud Computing
• Voice Recognition
• Image Processing
• Networking
• Data Mining
• Grid Computing
• Network Security
• Software Engineering

Electronics & Telecommunication Eng
Our area of interest for Electronics & Instrumentation Engineering is towards developing projects in the following areas
• Embedded Systems
• Wireless - ZigBee Wireless Sensor Network
• Robotics
• VLSI Designs using VHDL & Virology
• GSM /GPS
• Digital Image Processing
• RFID
• Biometrics

Topics Covered

VLSI PROJECTS 2015-16
S.NO. IEEE PROJECT NAME
1 A novel fault detection and correction technique for memory applications
2 Efficient FPGA Implementation of Address Generator for WiMAX Deinterleaver
3 High Performance Hardware Implementation of AES Using Minimal Resources
4 Reconfigurable Processor for Binary Image Processing
5 Design of Optimized CIC Decimator and Interpolator in FPGA
6 RTL Design and VLSI Implementation of an efficient Convolutional Encoder and Adaptive Viterbi Decoder
7 High Speed 3D DWT VlSI Architecture for Image Processing Using Lifting Based Wavelet Transform
8 Binary-tree-based High Speed Packet Classification System on FPGA
9 IP Core Based Architecture of Telecommand System-on-Chip (SoC) for Spacecraft applications
10 Simulation and Implementation of LDPC Code in FPGA
11 FPGA Implementation of Moving Object Detection in Frames by Using Background Subtraction Algorithm
12 Traffic-aware Design of a High Speed FPGA Network Intrusion Detection System
13 Design and Implementation of an On-Chip Permutation Network for Multiprocessor System-On-Chip
14 100 Gbit/s Scrambler Architectures for OTN Protocol: FPGA Implementation and Result Comparison
15 Ultra-High Throughput Low-Power Packet Classification
16 Design of Reversible Counter
17 PNOC: Implementation on Verilog for FPGA
18 A Practical NOC Design for Parallel DES Computation
19 Design and Implement of QPSK Modem Based on FPGA
20 Design and Optimization of Flexible and Coding Efficient All-Digital RF Transmitters
21 Performance Enhancements in Reconfigurable Instruction Set Processors Using Tightly Coupled Configuration Units
22 FPGA Based Single Cycle, Reconfigurable Router for NoC Applications
23 Stream Cipher Design using Cellular Automata Implemented on FPGAs
24 Hardware Implementation of Truncated Multiplier Based on Multiplexer Using FPGA
25 VLSI Implementation of an adaptive edge enhanced image scalar for real-time multimedia applications
26 FPGA Implementation of ANN for Reactive Routing Protocols in MANET
27 Hardware Implementation of 1D DCT/IDCT for WLAN Channel Estimation
28 DS-SS communication system using pseudo chaotic sequences generator
29 Low Complexity FBMC Transceiver for FPGA Implementation
30 Low Power VLSI Implementation of Adaptive Noise Canceller Based on Least Mean Square Algorithm

Who should attend

Final year BE/ME and PHD students

Pre-requisites

Knowledge on o Xilinx Spartan III FPGA development board

What you need to bring

Notebook,Laptop""

Key Takeaways

Final year projects,matlab ieee projects,academic project guidance,ieee paper publishing,journal paper publishing,ieee transactions. project completion certificate
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About the Trainer


Mr. Nandu Y is a consultant who has 7+ years of experience in Development & Training of C/C++, Android,JAVA, J2EE&J2ME in the area of Mobile Application development, e-Security, Network Programming and Cryptography. Presently working as a Senior Software Developer. he is trained various corporate clients Mphasis, TCS, IBM, Samsung India, Sony India, Teleca India, Sasken Communication, Philips Electronics India Ltd & many More.
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Course Id: 26763